Digital systems often require buffers that drive large capacitive loads. Complementary metal-oxide-semiconductor (CMOS) circuits are often used in digital systems. Higher-performance systems require increased speed and current requirements for output buffers driving external loads such as busses. Higher current drive increases speed because load capacitances are more quickly charged or discharged. Unfortunately, unwanted noise is often increased too.
CMOS chips with higher-drive output buffers often produce a type of noise known as ground bounce, due to rapid changes in current through the parasitic inductances of the integrated circuit (IC) package. These inductances resist changes in current by changing the voltages on power or ground supplies. Such voltage changes can falsely trigger logic within the IC device, or other devices in the system.
The rate of voltage change of the output, the edge rate, increases for these faster devices. The high edge rate can reflect off the ends of printed-circuit-board (PCB) wiring traces driven by the output buffer. These reflections produce voltage variations known as undershoot, overshoot, and ringing (oscillation). Careful layout of these wiring traces is needed to minimize trace-ends that can cause reflections. Termination devices such as resistors to ground at the ends of the traces are often used to absorb the reflection-causing wave front produced by the high edge rate.
Dampening resistors are sometimes used. Dampening resistors are resistors in series on the wiring trace rather than to power or ground. Dampening resistors reduce or slow down the high edge rate as well as any reflections. While discrete dampening resistors are often used, the output buffer itself provides some impedance, which also acts as a dampening resistor. Unfortunately, this impedance decreases with higher-current-drive output buffers. The lower impedance of these output buffers creates a greater mis-match between the output buffer's impedance and the impedance of the wiring trace.
Power budgets also limit the quality of termination. Lower-impedance resistors consume much power. CMOS chips driving terminated lines can only sink or source a limited amount of current in the static or D.C. state. The D.C. current specifications of CMOS chips, known as I.sub.OL and I.sub.OH, are usually not large enough for termination resistors smaller than 100 or 50 ohms. Better termination could be obtained if 10 or 20 ohm resistors were used for termination.
FIG. 1 shows a prior-art CMOS output buffer. Signal PUP is raised high to the Vcc power-supply voltage when the output is to be driven high. Pre-driver 20 is a standard CMOS inverter with p-channel transistor 14 and n-channel transistor 16. The high signal on input PUP turns on n-channel transistor 16 but turns off p-channel transistor 14, driving a low voltage (ground) onto node PG. Node PG is the gate of p-channel driver transistor 10, which is turned on, driving the output pad high toward Vcc. Signal NDN is off (high), causing n-pre-driver 22 to drive a low onto node NG, keeping n-channel driver transistor 12 off.
When the output is to be driven low, PUP goes low, causing p-pre-driver 20 to drive node PG high, turning off p-channel driver transistor 10. Signal NDN goes low, causing p-channel transistor 18 in n-pre-driver 22 to turn on, while n-channel transistor 19 is off. The output of n-pre-driver 22, node NG, is driven high, turning on n-channel driver transistor 12. The output pad is then pulled low to ground. The sources of all transistors are connected directly to power or ground, although perhaps a separate ground line within the chip is used for output n-channel driver transistor 10.
FIG. 2 is a diagram of a waveform of a prior-art high-drive output buffer driving a wiring trace on a circuit board. The high current drive of the output buffer produces a high edge rate that rapidly changes the output voltage from ground to the power-supply voltage, Vcc. The high edge rate produces a wave front that travels down the wiring trace and reflects off one or more ends. The reflected wave front then travels back up the wiring trace to the output buffer, and raises the voltage at the output buffer when the reflected wave arrives. The raised voltage is above Vcc and is known as an overshoot. This reflected wave then reverses direction and travels back to the end of the wiring trace, is reflected, and again reaches the output buffer, producing a series of both overshoots and undershoots, known as ringing. Since the reflected wave is dampened and loses energy at each reflection, the amplitude of the ringing gradually decreases. Low-going ringing (undershoot) is caused by a mis-match in impedance. Multiple reflections interfere with each other and cause the ringing.
When the output buffer switches from high to low, another high-edge rate wave travels down the wiring trace and is reflected back, producing undershoot and more ringing. This undershoot can cause ground bounce inside the output buffer's IC.
When the ringing and over/undershoot is large, logic can read a static signal as low when the static signal is actually high. For example, a static 3-volt signal input to another pin of the IC is a high signal, but when the internal ground of the IC bounces up from 0 volt to 2 volt, the static 3-volt signal appears to be a 1-volt signal, a low input. When the input signal is connected to a latch or flip-flop, the false low can be latched in, causing an error. Thus noise is a serious problem.
Several prior-art solutions to these problems are known. For example, Pierce et al., U.S. Pat. No. 5,319,252, assigned to Xilinx Inc. of San Jose, Calif., discloses an output buffer which gradually turns output buffers on and off so that there is no sharp discontinuity in the current flow. The output voltage is fed back to gradually turn off the output buffer at the end of the voltage transition. Lipp in U.S. Pat. No. 5,347,177, discloses a closed-loop trace which is driven by output buffers with level-sensitive impedance control.
What is desired is a control circuit for a CMOS output buffer. It is desired to control the rate that the driver transistors are turned on and off. It is desired to control the gate nodes of the driver transistors by carefully controlling the edge rate of the pre-driver stages. It is desired to provide feedback to the pre-driver stage in an output buffer.